The present invention relates in general to a high speed waveform digitizer system of the type which employs a parallel array of digitizers to sample and digitize a waveform at successive times, and in particular to a method and apparatus for measuring and adjusting the time interval between successive waveform samples.
A typical waveform digitizer employs a sample and hole (S/H) circuit to sample and store a voltage representing the instantaneous magnitude of an input signal and an analog-to-digital (A/D) converter which produces digital output data proportional to the sample voltage, thereby representing the instantaneous magnitude of the input signal. The sampling rate of such a digitizer is usually limited by the rate at which the A/D converter can convert the sample voltage to a stable digital value.
Digitizer systems comprising arrays of such digitizers have been developed which can sample and digitize an input signal at a higher rate than any one digitizer can operate. The input signal is applied in parallel to each digitizer of the array. A single clock signal passes through a multiple tap delay line (or a succession of time delay circuits), each tap of the line providing the clock signal input to a successive one of the digitizers so that for each successive digitizer of the array, the clock signal is delayed by a longer time. Thus each digitizer samples and digitizes the input signal once during each cycle of the clock signal, but at a different relative time during the cycle. The sequences of output data produced by all of digitizers are collected and stored in an interleaved fashion to provide a single data sequence representative of the input signal. While the propagation delay of each A/D converter of each individual digitizer need only by slightly less than the period of the clock signal, the effective sampling rate of an array of M digitizers is M times the frequency of th clock signal.
For a clock signal of frequency f.sub.s /M, each section of the delay line should delay the strobe signal by 1/f.sub.s so that samples are taken at evenly spaced intervals. The resulting data sequence is then equivalent to a sequence produced by a single digitizer operating at a sampling frequency of f.sub.s. The effective sampling rate of such a digitizer array (and therefore the sampling time resolution of the sampling system) can be increased by increasing the number M of digitizers in the array and the number of taps in the delay line, and decreasing the time delay between each tap of the delay line. However, the accuracy with which the delay line can be adjusted to delay the clock signal places a limit on the sampling time resolution that can be obtained. As f.sub.s increases, the delay provided by each section of the delay line decreases, and small errors in the time delay provided by each section have an increasing effect on the relative accuracy with which each sample is timed. Differences in the response time of each digitizer, which can vary with ambiemt temperature or component aging, cause additional time delay errors. When the number of digitizers reaches a point at which the time delay errors become substantial in comparison to the nominal time delay of each delay line section, an increasae in the number M of digitizers cannot substantially improve the accuracy with which the data sequence produce by the array characterizes the input signal.